カテゴリ 重要度 ステータス 解決状況 登録日時 最終更新
システムコア重要 (ゲーム)解決済み修正済み2022-10-21 13:172022-10-23 18:13
 
テスターpnp2084担当者pnp2084ソースtrs/trs80.cpp
バージョン0.248発生バージョン修正バージョン0.249
修正コミット f5eeb26プルリク #10454
フラグ
セット trs80l2, trs80m4
セット詳細
trs80l2 - TRS-80 Model I (Level II Basic)
trs80m4 - TRS-80 Model 4
 
概 要WD FDC FMの同期が2箇所でずれる。
詳 細When wd_fdc.cpp code finds an FM sync mark, in a couple cases (read track and SEARCH_ADDRESS_MARK_HEADER) the "data_reg" value is examined or returned. But this is incorrect: data_reg is only valid after sync has been achieved. This results in the value C7 being examined instead of the correct FE (or FB, FA, F9, F8).

Also, not reproduced here, the read track was only looking for FB/F8 marks instead of the four possible DAM marks.
再現手順The TRSDOS sync problem will occur late in the boot. The DOS READY command prompt will never appear as the emulator endlessly retries a sector on track 17:
mame trs80l2 -flop1 trsdos23b.mfi


The SuperUtility for model 4 will fail to boot as the code which scans the READ TRACK command result will not find an FE in the (early) part of the track, instead there is an incorrect C7 clock byte in place of the FE.
mame trs80m4 -flop1 su4x.mfi
追加情報 
 
添付ファイルzip filefdcsync.zip (2022-10-21 13:17)
zip filefdc_fix.zip (2022-10-21 13:22)